Monday, September 17, 2007

Party time for PCIe

This week's Intel Developer Forum may act as something of a coming out part for PCI Express 2.0. PLX and Mellanox are both touting new Express Gen2 products today and I expect to see news from others when I troll the IDF floor this week. Pericom fired the started gun with a pre-announcement of their chips a few weeks ago, but now multiple companies have real, tested and shipping silicon.

Intel has already announced one chip set for Express 2.0, and I expect to hear about more members of the family this week. AMD and NVidia will likely follow suit to talk about their chip sets expected to emerge in systems before the end of the year.

Computer graphics and muscular PC servers are plowing the way on this change. Admittedly the data path and backplane silicon on routers, switches and other high end comms and military gear hit 6.25 Gbits/second and beyond a while back and they are gearing up for 10G now. But this week's news is the great bulk of the volume computing world is driving these fast interfaces into mainstream electronics.

True, the biggest signal integrity design challenges don't really start to kick in until you get a bit north of the max 5 GTransfers/second Express 2.0 enables. But the PC crowd sees that next step forward and has started real lab work on the migration into that zone too with Express 3.0.

Gentlemen and women, start your engines.

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