Wednesday, March 28, 2007

Get off the bus

It's time for today's on-chip bus to give way to the distributed mesh. That's the word from Anant Agarwal, professor at the Massachusetts Institute of Technology. You can read about it in an EE Times report by my colleague Richard Goering on Agarwal's keynote at the Multicore Expo yesterday.

The gist of Agarwal's point is that distributed meshes will replace busses and rings. Meshes help scale bandwidth as new cores are added to a chip, they can be 80-90 percent more power efficient than busses for 16 cores, and they can be simple to layout, he said. Agarwal was in part touting his Raw architecture, a tiled multicore approach using no centralized resources.

So for the Intel's and AMD's of the world still cranking out front-side bus, HyperTransport and CSI designs, now here this: "The bus-based multicore system will fade in the next year or two," said Agarwal.

I would easily add a couple more years to that prediction for the cost-sensitive PC laggards likely to ride this bus all the way back to the station.

1 comment:

RapidIO Executive Director said...

Do I need to say more then ?
Already in multi-core DSP and CPU chips and supports inside the chip, chip to chip and full system Distributed mesh computing, full ccNUMA and low cost and over head.