Monday, February 12, 2007

Swing low, high powered I/Os

That's the new song Rambus wants to teach the interconnect world with its ISSCC paper coming on Wednesday. Their 6Gbit serdes delivers 2.2 mW/Gbit/second based on a voltage swing of less than 200 milliVolts.

Many interconnect standards today specify 1V swings to make it easier to build the transceivers. But that spec is too loose as we enter the era when microprocessors are power bound.

Everybody ready to line up for the new limbo dance?

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