Wednesday, September 27, 2006

Fighting the good fight in signal integrity

Best wishes to Todd Westerhoff, a high speed design group manager at Cisco for the past six years.Todd is moving over to the vendor side where he will continue to fight today’s signal integrity battles. As a manager at SiSoft Todd will ”help drive the future direction of their Quantum-SI product line,” he said in an email.

I gave Todd a call to wish him well and dig under the surface a bit more. Todd has been a leading light in the IBIS Advanced Tech Modeling group trying to set a standard for SI modeling with chip vendors. The group has a proposal from Cadence to use some new and proprietary technology and another proposal from Mentor to use Verilog-AMS.

”We are struggling with which semiconductor vendors support which approach and right now we don’t have any consensus,” Todd said.

Todd said another big problem in SI simulation today is serial links faster than 3Gbit/s have no open eye to measure. SiSoft has a product in the works to handle that issue, but they are not ready to discuss it yet. Stay tuned!

The other big SI issue today is in parallel link design where engineers need to conduct timing, SI and power analysis in same environment to evaluate interconnect delays at a given speed and thus make choices on physical design. What’s more, those issues have to be examined holistically for the chip die, package and board. And the issues are only getting worse as lower voltage chips emerge that naturally tolerate less noise and are thus harder to regulate in terms of power.

“Part of what I want to do [at SiSoft] is help make that clear,” Todd said,

Todd did cry foul on posters to my Sept. 8 blog who said full board-level SI simulation tools are too expensive with costs ranging from $150-200,000 per seat. Only one vendor charges anything near that range, and there are other vendors who charge from $70-150k for high-speed serial tools and $20-60 for parallel link tools, so shop around, he says.

Good luck, Todd, and stay in touch!--rbm

2 comments:

Anonymous said...

Hi Rick,

I'm the original poster from Sep 8 and just to respond to Todd - my price outline was for a full tool suite that would do simulations for XFI designs - HSPICE, S-Parameter capable Simulator, and a 3d Field Solver. Todd's pricing seems accurate to me for a s-paramater simulator (so long as it is not from a certain vendor..) but is too low for all 3 items combined.

Show me a full solution for XFI simulation that starts at 70k for a perpetual license and includes HSPICE encrpyted model support and you have my attention :>

Radhe said...

Rick, I am sure Todd will make Sisoft another best EDA tool in the industry. ( Bijesh Radhakrishnan, India)

 
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